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Other embodiments in certain situations force an early write of the parity for a partial stripe that has not been fully written to the non-volatile media. Those situations may include a data access error on data in a partial stripe and a detected power loss event with a partial stripe present.
Embodiments are directed to writing additional data with the parity data for the partial stripe and then later using the additional data in data recovery.
This approach allows the controller to easily detect the presence of a partial stripe and handle such a stripe accordingly. Typically, a target number of storage elements e.
However, there are situations when the parity for an open stripe is written to the flash media before the stripe is fully written. For example, in various embodiments of the invention, it may be appropriate to force a write of the parity data associated with an open stripe upon the detection of an uncorrectable data access error e.
In another example, the parity data may be written to the flash media when there is a detected power loss event and an open stripe present. Whatever the original cause that may have triggered the early write of parity data, embodiments of the invention are directed to writing additional data with the parity data to the flash media and then later using the additional data in data recovery operations.
This approach allows the storage subsystem to easily detect the presence of a partial stripe and handle such a stripe accordingly. In one embodiment, the additional data is written in a spare area that is typically reserved for various system metadata and is used to indicate validity of pages in the partial stripe.
As shown, a storage subsystem includes a controller and one or more non-volatile solid-state memory arrays The arrays may comprise a plurality of solid-state storage devices coupled to the controller The solid-state storage devices may be physically divided into planes, blocks, pages, and sectors, as is known in the art.
Other forms of storage e. In another embodiment, the volatile memory is outside of the controller in the storage subsystem In one embodiment, the RAID module is configured to execute data access commands to maintain a data redundancy scheme in the storage subsystem.
For example, the RAID module may maintain data on which storage elements are assigned to which RAID stripes and determine how data are arranged in the data redundancy scheme e.
In another embodiment, the various processes described herein may be executed by the RAID module within the controllerby one or more components within the controlleror by a combination of both. In one embodiment, the controller of the storage subsystem is configured to receive and execute commands from a storage interface in a host system The memory commands from the storage interface may include write and read commands issued by the host system As further shown in FIG.
As will be explained below, in one embodiment, the volatile memory is configured to temporarily hold parity data for data stripes e. In one embodiment, when a stripe is complete e.
In one embodiment, the user data may be held in a separate volatile memory than that which is used to hold the parity data, or in a different portion of the volatile memory than that which is used for the parity data. The controller may also execute internal memory commands such as those needed for garbage collection and wear leveling, etc.
In addition, although RAID is an acronym for Redundant Array of Independent Disks, those skilled in art will appreciate that RAID is not limited to storage devices with physical disks and is applicable to a wide variety of storage devices including the non-volatile solid state devices described herein.
In blockthe controller handles the creation of data stripes as data is received from the host or via internal commands such as garbage collection. At the same time, the controller may be processing read commands on data stripes that have already been written to the non-volatile memory array.
Blocks and illustrate two example conditions under which parity for a partial stripe may be written to the non-volatile memory. In blockit is determined whether an uncorrectable error e.
In one embodiment, the controller employs an ECC error-correcting code mechanism to attempt to correct any reading error, but the error is deemed uncorrectable if the ECC mechanism cannot correct it. Note that if the error is correctable, the condition is not met in block and there is no need to force an early write of the parity data.
Although an ECC read error example is described here, the same process is applicable to a program error as well.
If an uncorrectable data access error has occurred, the controller would force a write of parity data for that open stripe block In one embodiment, this means that the parity data for the open stripe that is currently held in the volatile memory is written to the non-volatile memory array.
In blockthe controller may also determine whether there is a power failure event occurring with an open stripe present. If so, the parity data for the open stripe is written to the non-volatile memory as part of the power failure handling process block In either case, the controller in block may execute a recovery process using the newly written parity data.
Although not shown, there are other situations besides those illustrated in blocks and where the controller may write the parity for an open stripe. For example, certain data transfer interface standards support a Force Unit Access F.
Stripes are all full stripes in the sense that each has 15 data pages covered by one parity page. Stripes have all been written to the non-volatile memory array. These three stripes represent stripes created under normal operation in which no uncorrectable e.
In one embodiment, for these completed stripes with parity already written, any error not corrected by ECC can be corrected by using the normal RAID recovery procedure using the parity data.Ariel Felner, Ben-Gurion University Guni Sharon, Ben-Gurion University Nathan R.
Sturtevant, University of Denver. id url title from to date time attachments total attachments kb contains fwd message keywords. Write amplification is a major cause of performance and endurance degradations in NAND flash based storage systems.
In an object-based NAND flash device, two causes of write amplification are onode partial update and cascading update. Write amplification reduction through reliable writes during garbage collection USB2 (en) Bennett Jon C R: Method and system for storage of data in non-volatile media USA1 (en) Anand Krishnamurthi Kulkarni: Flash devices with raid USA1 (en).
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Transforming the world through collaboration. Revolutionizing how research is conducted. Gaurav Anand, Sumit Sharma, Sanat K. Kumar and Georges Belfort Langmuir 0 (proofing), Abstract | Full Text HTML.